How does it all work?

The CPU operates using the Fetch-Decode-Execute cycle.

Fetch

1. The address of the next instruction is copied from the Program Counter (PC) to the Memory Address Register (MAR).
2. The PC is immediately incremented to point to the address of the following instruction.
3. The CPU sends a signal along the address bus to the memory location held in the MAR.
4. The instruction at that address is sent back via the data bus and stored in the Memory Data Register (MDR).
5. The instruction is copied from the MDR into the Current Instruction Register (CIR).

Decode

The Control Unit (CU) makes sense of the instruction sitting in the CIR.

The instruction is split into two parts:

• Opcode: The command itself (e.g., ADD, SUB, LOAD).
• Operand: The data to be used, or the memory address where that data is located.

The CU interprets the opcode and prepares any necessary hardware pathways.

Execute

The instruction is carried out. Depending on the command, this might involve:

• Arithmetic/Logic: The ALU performs calculations.
• Data Transfer: Moving data between registers or back to RAM.
• Result Storage: Results of calculations are often stored in the Accumulator (ACC).

Once finished, the processor checks for interrupts (signals from hardware or software needing attention) and restarts the cycle with the new address in the PC.